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[Bug target/64015] [5.0 Regression] AArch64 ICE due to conditional compare


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64015

--- Comment #4 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #3)
> See how with forcing is always the same size or smaller?

Actually is always smaller by at least one instruction. due to the need to  do
one extra cset and one and/or compared to one mov.


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