This is the mail archive of the gcc-bugs@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug rtl-optimization/62030] wrong code due to ifcvt merging two stores which have different aliasing sets


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62030

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Here are the two stores:

(insn 30 25 33 3 (set (mem/f:DI (reg/v/f:DI 200 [ prev ]) [5 MEM[(struct head
*)&heads][_8].first+0 S8 A64])
        (reg/v/f:DI 199 [ next ])) t.c:22 302 {*movdi_64bit}
     (expr_list:REG_DEAD (reg/v/f:DI 200 [ prev ])
        (expr_list:REG_DEAD (reg/v/f:DI 199 [ next ])
            (nil))))


(insn 35 34 36 4 (set (mem/f:DI (reg/v/f:DI 200 [ prev ]) [3 prev_11->next+0 S8
A64])
        (reg/v/f:DI 199 [ next ])) t.c:24 302 {*movdi_64bit}
     (expr_list:REG_DEAD (reg/v/f:DI 200 [ prev ])
        (expr_list:REG_DEAD (reg/v/f:DI 199 [ next ])
            (nil))))


Note the reason why I think this does not happen for x86 (or even aarch64) is
due to the constraints on mem operands on MIPS.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]