[Bug rtl-optimization/60763] [4.9 Regression] ICE in extract_insn starting with rev 208984

["rsandifo at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60763

--- Comment #6 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> ---
(In reply to David Edelsohn from comment #5)
> I can see why the proposed patch will work, but it seems a little
> heavy-handed. This case isn't something that simplify_gen_subreg() should
> handle?

Normally it does, but in this case the backend uses CANNOT_CHANGE_MODE_CLASS
to stop it:

      if (from_size < 8 || to_size < 8)
        return true;

But AIUI the mode change is OK in this split.  We start out with a 64-bit
value in which the upper 32 bits are significant, then convert it to SFmode.

Maybe it'd be more obvious if the input to vsx_xscvspdpn_directmove had
the DImode version of the register too, to emphasise that no mode change
happens outside the patterns.