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[Bug target/57329] ICE with -O2 and -mthumb
- From: "terry.guo at arm dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Mon, 03 Jun 2013 09:33:34 +0000
- Subject: [Bug target/57329] ICE with -O2 and -mthumb
- Auto-submitted: auto-generated
- References: <bug-57329-4 at http dot gcc dot gnu dot org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57329
Terry Guo <terry.guo at arm dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |terry.guo at arm dot com
--- Comment #2 from Terry Guo <terry.guo at arm dot com> ---
The case has operations on vector for Thumb-1 targets. Thus subreg is generated
for example:
(insn 65 64 66 2 (set (subreg:SI (reg:TI 137 [ D.4126 ]) 4)
(reg:SI 211)) 187 {*thumb1_movsi_insn}
(nil))
The subreg:SI is supposed to be turned into normal reg:SI in subreg1 pass.
However current 4.8 branch incorrectly calculates the rtx cost of such
transformation.
Speed costs
===========
SI move: from zero cost 4, from reg cost 4
DI move: original cost 4, split cost 4 * 2
TI move: original cost 4, split cost 4 * 4
EI move: original cost 4, split cost 4 * 6
The subreg will be kept until IRA stage and causes ICE there.
With Bin's patch at http://gcc.gnu.org/ml/gcc-cvs/2013-03/msg00784.html, we
will get correct rtx cost:
Speed costs
===========
SI move: from zero cost 4, from reg cost 4
DI move: original cost 8, split cost 4 * 2
TI move: original cost 16, split cost 4 * 4
EI move: original cost 24, split cost 4 * 6
Then the split happens, we will get:
(insn 65 64 66 2 (set (reg:SI 393 [ D.4126+4 ])
(reg:SI 211)) 187 {*thumb1_movsi_insn}
(nil))
and then everything works well.
I believe this is the cause of the issue and am doing back port to 4.8 branch.