[Bug middle-end/56791] New: Segmentation fault in stage2 gengenrtl -- Incorrect instruction sequence generated by reload

["danglin at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56791

             Bug #: 56791
           Summary: Segmentation fault in stage2 gengenrtl -- Incorrect
                    instruction sequence generated by reload
    Classification: Unclassified
           Product: gcc
           Version: 4.8.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: danglin@gcc.gnu.org
              Host: hppa1.1-hp-hp10.20
            Target: hppa1.1-hp-hp10.20
             Build: hppa1.1-hp-hp10.20


Created attachment 29757
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=29757
Preprocessed source

/xxx/gnu/gcc/objdir/./prev-gcc/xg++ -B/xxx/gnu/gcc/objdir/./prev-gcc/
-B/opt/gnu/gcc/gcc-4.8/hppa1.1-hp-hpux10.20/bin/ -nostdinc++
-B/xxx/gnu/gcc/objdir/prev-hppa1.1-hp-hpux10.20/libstdc++-v3/src/.libs
-B/xxx/gnu/gcc/objdir/prev-hppa1.1-hp-hpux10.20/libstdc++-v3/libsupc++/.libs
-I/xxx/gnu/gcc/objdir/prev-hppa1.1-hp-hpux10.20/libstdc++-v3/include/hppa1.1-hp-hpux10.20
-I/xxx/gnu/gcc/objdir/prev-hppa1.1-hp-hpux10.20/libstdc++-v3/include
-I/xxx/gnu/gcc/gcc/libstdc++-v3/libsupc++
-L/xxx/gnu/gcc/objdir/prev-hppa1.1-hp-hpux10.20/libstdc++-v3/src/.libs
-L/xxx/gnu/gcc/objdir/prev-hppa1.1-hp-hpux10.20/libstdc++-v3/libsupc++/.libs  
-g -O2 -DIN_GCC   -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W
-Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute
-pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings  
-DHAVE_CONFIG_H -DGENERATO
R_FILE -static-libstdc++ -static-libgcc  -o build/gengenrtl \
    build/gengenrtl.o build/errors.o .././libiberty/libiberty.a
build/gengenrtl > tmp-genrtl.h
/bin/sh: 9799 Memory fault(coredump)
make[3]: *** [s-genrtl-h] Error 139

In the generated assembly code, the fault occurs in the ldw instruction
using register %r19.

        .CALL ARGW0=GR
        bl puts,%r2
        ldo RR'L$C0034(%r26),%r26
L$BE0063:
L$BE0067:
        .stabn  68,0,270,L$M0084-L$FBB0002
L$M0084:
        ldw 0(%r19),%r20
        ldws,ma 4(%r20),%r4

%r19 is clobbered by the preceding call to puts.  The problem occurs
in reload.  Prior to reload, we have the following for insn 448:

(insn 448 447 450 57 (set (reg/v/f:SI 242 [ format ])
        (mem/f:SI (post_inc:SI (reg/f:SI 243 [ ivtmp.101 ])) [3 MEM[base: _104, 
offset: 0B]+0 S4 A32])) ../../gcc/gcc/gengenrtl.c:270 40 {*pa.md:2211}
     (expr_list:REG_INC (reg/f:SI 243 [ ivtmp.101 ])
        (nil)))

After reload, we have:

(call_insn 447 446 1092 57 (parallel [            (set (reg:SI 28 %r28)
                (call (mem:SI (symbol_ref/v:SI ("@puts") [flags 0x41] 
<function
_decl 7ae76100 __builtin_puts>) [0 __builtin_puts S4 A32])
                    (const_int 16 [0x10])))
            (clobber (reg:SI 1 %r1))
            (clobber (reg:SI 2 %r2))
            (use (const_int 0 [0]))
        ]) ../../gcc/gcc/gengenrtl.c:247 203 {call_val_symref}
     (nil)
    (expr_list:REG_CC_SETTER (use (reg:SI 26 %r26))
        (nil)))
(insn 1092 447 1091 57 (set (reg:SI 20 %r20)
        (mem/c:SI (reg:SI 19 %r19) [7 %sfp+8 S4 A32]))
../../gcc/gcc/gengenrtl.c
:270 40 {*pa.md:2211}
     (nil))
(insn 1091 1092 448 57 (set (reg:SI 19 %r19)
        (plus:SI (reg/f:SI 30 %r30)
            (const_int -120 [0xffffff88]))) ../../gcc/gcc/gengenrtl.c:270 112
{a
ddsi3}
     (nil))
(insn 448 1091 1093 57 (set (reg/v/f:SI 4 %r4 [orig:242 format ] [242])
        (mem/f:SI (post_inc:SI (reg:SI 20 %r20)) [3 MEM[base: _104, offset:
0B]+0 S4 A32])) ../../gcc/gcc/gengenrtl.c:270 40 {*pa.md:2211}
     (expr_list:REG_INC (reg:SI 20 %r20)
        (nil)))

Insns 1091 and 1092 are interchanged.

I'm not sure but there appears to be special handling for increment
instructions here:

  if (old != 0
      /* AUTO_INC reloads need to be handled even if inherited.  We got an
         AUTO_INC reload if reload_out is set but reload_out_reg isn't.  */
      && (! reload_inherited[j] || (rl->out && ! rl->out_reg))
      && ! rtx_equal_p (reg_rtx, old)
      && reg_rtx != 0)
    emit_input_reload_insns (chain, rld + j, old, j);

emit_input_reload_insns is called from the above after insn 1091 is emitted.

Can reproduce on i686-apple-darwin9.

Probably, this affects other hppa targets.

Compilation command:

-fpreprocessed gengenrtl.ii -quiet -dumpbase gengenrtl.c -mschedule=7100LC
-auxbase-strip build/gengenrtl.o -g -O2 -Wextra -Wall -Wno-narrowing
-Wwrite-strings -Wcast-qual -Wsuggest-attribute=format -Wpedantic
-Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -version
-fno-exceptions -fno-rtti -fasynchronous-unwind-tables -o gengenrtl.s