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[Bug target/53124] Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm)
- From: "ksebov at rim dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Thu, 26 Apr 2012 14:29:12 +0000
- Subject: [Bug target/53124] Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm)
- Auto-submitted: auto-generated
- References: <bug-53124-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53124
Kostya Sebov <ksebov at rim dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|RESOLVED |UNCONFIRMED
Resolution|INVALID |
--- Comment #3 from Kostya Sebov <ksebov at rim dot com> 2012-04-26 14:29:12 UTC ---
(In reply to comment #2)
> The compiler and assembler are correct. The instruction is:
>
> VSHRN.I<size> Dd, Qm, #imm
>
> and the immediate, imm, must be in the range 1..size/2
>
> So for vshrn.i32 imm must be in the range 1..16
>
I apologize if I miss something but,as far as I can see, the ARM docs clearly
say the imm should be in 0..size-1 range (see the link to the above). This is
the nature of the bug.
> Please also note that gcc-4.4 is now very old and no-longer being maintained, I
> strongly suggest you upgrade to a more recent set of tools.
>
I've checked the trunk source and the incorrect range is still there.