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[Bug target/52530] [4.8 regression] Many 64-bit execution failures on Solaris 10/11 with Sun as
- From: "ubizjak at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Fri, 09 Mar 2012 16:50:12 +0000
- Subject: [Bug target/52530] [4.8 regression] Many 64-bit execution failures on Solaris 10/11 with Sun as
- Auto-submitted: auto-generated
- References: <bug-52530-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52530
Uros Bizjak <ubizjak at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|REOPENED |ASSIGNED
--- Comment #7 from Uros Bizjak <ubizjak at gmail dot com> 2012-03-09 16:50:12 UTC ---
(In reply to comment #6)
> This patch works for me:
>
> ---
> diff --git a/gcc/ChangeLog.addr32 b/gcc/ChangeLog.addr32
> index 066f1ec..a191e47 100644
> --- a/gcc/ChangeLog.addr32
> +++ b/gcc/ChangeLog.addr32
> @@ -1,3 +1,8 @@
> +2012-03-08 H.J. Lu <hongjiu.lu@intel.com>
> +
> + * config/i386/i386.c (ix86_print_operand_address): Only handle
> + zero-extended DImode addresses if Pmode == DImode.
> +
> 2012-03-06 Uros Bizjak <ubizjak@gmail.com>
>
> * config/i386/i386.md (*zero_extendsidi2_rex64): Allow loading
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index 69cb6ae..c2cad5a 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -14548,7 +14548,7 @@ ix86_print_operand_address (FILE *file, rtx addr)
>
> /* Print SImode registers for zero-extended addresses to force
> addr32 prefix. Otherwise print DImode registers to avoid it. */
> - if (TARGET_64BIT)
> + if (Pmode == DImode)
> code = ((GET_CODE (addr) == ZERO_EXTEND
> || GET_CODE (addr) == AND)
> ? 'l'
> --
You will have addr32 added to all lea(%SImode),%SImode instructions.
I have a patch in testing that emits addresses in their natural mode (SImode or
DImode), forces 'l' override for the above RTXes and 'q' for all LEA insns.
For LEAs, we introduce %E modifier that enables special handling:
+ case 'E':
+ /* Wrap address in an UNSPEC to declare special handling. */
+ if (TARGET_64BIT)
+ x = gen_rtx_UNSPEC (DImode, gen_rtvec (1, x), UNSPEC_LEA_ADDR);
+
+ output_address (x);
+ return;
And in ix86_print_operand_address:
+ else if (GET_CODE (addr) == UNSPEC && XINT (addr, 1) == UNSPEC_LEA_ADDR)
+ {
+ gcc_assert (TARGET_64BIT);
+ ok = ix86_decompose_address (XVECEXP (addr, 0, 0), &parts);
+ code = 'q';
+ }