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[Bug middle-end/45416] [4.5/4.6/4.7 Regression] Code size regression between 4.6/4.7(4.5) and 4.4 for ARM
- From: "pinskia at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Mon, 05 Dec 2011 20:40:59 +0000
- Subject: [Bug middle-end/45416] [4.5/4.6/4.7 Regression] Code size regression between 4.6/4.7(4.5) and 4.4 for ARM
- Auto-submitted: auto-generated
- References: <bug-45416-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45416
--- Comment #10 from Andrew Pinski <pinskia at gcc dot gnu.org> 2011-12-05 20:40:59 UTC ---
/* If this is an equality or inequality test of a single bit, we can
do this by shifting the bit being tested to the low-order bit and
masking the result with the constant 1. If the condition was EQ,
we xor it with 1. This does not require an scc insn and is faster
than an scc insn even if we have it.
The code to make this transformation was moved into fold_single_bit_test,
so we just call into the folder and expand its result. */
if ((code == NE || code == EQ)
&& TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
&& integer_pow2p (TREE_OPERAND (arg0, 1))
&& (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
This needs to be updated for the out-of-ssa expand.