This is the mail archive of the gcc-bugs@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug target/49833] [x32] PIC doesn't work


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49833

--- Comment #4 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-25 15:20:42 UTC ---
A shot-in-the-dark change:

(define_insn "*add<mode>_1"
  [(set (match_operand:SWI48 0 "nonimmediate_operand" "=r,rm,r,r")
    (plus:SWI48
      (match_operand:SWI48 1 "nonimmediate_operand" "%0,0,r,r")
      (match_operand:SWI48 2 "<add_operand>" "rme,re,0,le")))
   (clobber (reg:CC FLAGS_REG))]

and

(define_insn "addsi_1_zext"
  [(set (match_operand:DI 0 "register_operand" "=r,r,r")
    (zero_extend:DI
      (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,r,r")
           (match_operand:SI 2 "addsi_operand" "rme,0,le"))))
   (clobber (reg:CC FLAGS_REG))]

The constraints of operand 2 now fully follow addsi_operand predicate.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]