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[Bug target/49385] Invalid RTL intstruction for ARM
- From: "revital.eres at linaro dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Mon, 13 Jun 2011 11:27:05 +0000
- Subject: [Bug target/49385] Invalid RTL intstruction for ARM
- Auto-submitted: auto-generated
- References: <bug-49385-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385
--- Comment #2 from revital.eres at linaro dot org 2011-06-13 11:26:44 UTC ---
(In reply to comment #1)
> I get no ICE on this with 4.7 r174986, even with --enable-checking, and the
> assembler doesn't complain about the generated code.
> So what is the problem?
The generated code does not produce ICE. However the RTL instruction is not
valid as far as I understand so it should not be generated at any stage of the
compilation.