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[Bug target/48366] [4.7 Regression] ICE in extract_constrain_insn_cached, at recog.c:2024


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48366

--- Comment #13 from John David Anglin <danglin at gcc dot gnu.org> 2011-04-19 14:21:24 UTC ---
Author: danglin
Date: Tue Apr 19 14:21:18 2011
New Revision: 172710

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=172710
Log:
    * config/pa/pa.h (REGISTER_MOVE_COST): Increase to 18 cost of
    move from floating point to shift amount register.

    Backport from mainline:
    2011-04-08  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

    PR target/48366
    * config/pa/pa.c (emit_move_sequence): Remove secondary reload
    support for floating point to shift amount amount register copies.
    (pa_secondary_reload): Return GENERAL_REGS for floating point/shift
    amount register copies.
    * config/pa/pa32-regs.h (HARD_REGNO_MODE_OK): For shift amount
    register, return false if mode isn't a scalar integer mode.
    * config/pa/pa64-regs.h (HARD_REGNO_MODE_OK): Likewise.


Modified:
    branches/gcc-4_4-branch/gcc/ChangeLog
    branches/gcc-4_4-branch/gcc/config/pa/pa.c
    branches/gcc-4_4-branch/gcc/config/pa/pa.h
    branches/gcc-4_4-branch/gcc/config/pa/pa32-regs.h
    branches/gcc-4_4-branch/gcc/config/pa/pa64-regs.h


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