[Bug rtl-optimization/48658] New: [4.3 Regression]: ICE in reload_cse_simplify_operands, at postreload.c:395

["hp at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48658

           Summary: [4.3 Regression]: ICE in reload_cse_simplify_operands,
                    at postreload.c:395
           Product: gcc
           Version: 4.3.6
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: hp@gcc.gnu.org
            Target: sparc64-*-*


Created attachment 24024
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=24024
Preprocessed test-case; repeat with "gcc -m32  -O2 -mcpu=ultrasparc  -mvis"

I'm unfortunately just going to park this report here, not reducing it or
analyzing it or anything.  While I believe it is somewhat related to
concatenating vectors to form a larger (supported) vector and thereby enticing
register allocation to use a suitable separable multi register accessible in
the wider mode (which works for trivial code), I haven't analyzed it enough to
state it as a fact.

Anyway, the following code does not ICE with "GNU C version 4.1.3 20080704
(prerelease) (Debian 4.1.2-25) (sparc-linux-gnu)". It does ICE with gcc-4.3.x
at least up to and including the "GNU C (GCC) version 4.3.6 20110410
(prerelease) (sparc64-unknown-linux-gnu)" snapshot.  It does not ICE with
gcc-4.4.0. It does ICE with "GNU C (GCC) version 4.4.0 20080820 (experimental)
[trunk revision 139269] (sparc64-unknown-linux-gnu)" (trunk before the 4.4
branch) so bisecting trunk from that revision up to the 4.0 branch should find
a commit that fixes or hides the bug.

It is not trivially identical to bug 37053, because this bug does not appear
for gcc-4.4.0, and bug 37053 was not fixed until gcc-4.5.0 (the fix has not
been backported to the 4.4 branch IIUC).