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[Bug target/48366] [4.7 Regression] ICE in extract_constrain_insn_cached, at recog.c:2024
- From: "dave at hiauly1 dot hia.nrc.ca" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Sun, 3 Apr 2011 18:37:12 +0000
- Subject: [Bug target/48366] [4.7 Regression] ICE in extract_constrain_insn_cached, at recog.c:2024
- Auto-submitted: auto-generated
- References: <bug-48366-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48366
--- Comment #7 from dave at hiauly1 dot hia.nrc.ca 2011-04-03 18:37:07 UTC ---
> I guess that the last patch (for pr48380) I sent should solve the problem too.
> Unfortunately, I did not get an approval for the patch yet.
I'll try it if it isn't install by the time I get to a retest.
> But the real reason of the problem is in wrong IRA directions.
The wrong IRA directions have exposed backend problems in handling
reloads for the shift amount register. I think I have a patch to
correct these issues. Testing the change now.
Thanks,
Dave