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[Bug rtl-optimization/45472] [4.5/4.6 Regression] ICE: in move_op_ascend, at sel-sched.c:6124 with -fselective-scheduling2
- From: "bonzini at gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Mon, 18 Oct 2010 12:21:03 +0000
- Subject: [Bug rtl-optimization/45472] [4.5/4.6 Regression] ICE: in move_op_ascend, at sel-sched.c:6124 with -fselective-scheduling2
- Auto-submitted: auto-generated
- References: <bug-45472-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45472
--- Comment #8 from Paolo Bonzini <bonzini at gnu dot org> 2010-10-18 12:20:39 UTC ---
Would it make sense to make the statement volatile even if only some
subcomponents (or all subcomponents) are volatile?
I like (2); if I understand it correctly, in this case vv1 and vv2 would not be
volatile, but you'd still have
vv1 ={v} vv2;
in the GIMPLE source. It should be possible to use a bit on
{ARRAY,RECORD,UNION,QUAL_UNION}_TYPE to cache this, e.g.
#define TYPE_HAS_VOLATILE_PARTS(T) \
(AGGREGATE_TYPE_P (T) \
? TYPE_UNSIGNED (T) \
: TYPE_VOLATILE (T))
#define AGGREGATE_TYPE_CHECK(T) \
TREE_CHECK4(T, ARRAY_TYPE, RECORD_TYPE, UNION_TYPE, QUAL_UNION_TYPE)
#define SET_TYPE_HAS_VOLATILE_PARTS(T, V) \
(TYPE_UNSIGNED (AGGREGATE_TYPE_CHECK (T)) = (V))
Separately, expand would of course need to be taught about expanding accesses
to volatile subcomponents as mem/v. If this approach was feasible, it would
have the advantage of splitting the task in two parts, one for GIMPLE
(including possibly the verifier) and one for expand.