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[Bug target/42495] redundant memory load
- From: "mkuvyrkov at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 8 Jun 2010 10:41:43 -0000
- Subject: [Bug target/42495] redundant memory load
- References: <bug-42495-17659@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #5 from mkuvyrkov at gcc dot gnu dot org 2010-06-08 10:41 -------
Elimination of subsequent calculations of PIC addresses should be handled in
code hoisting optimization.
However, there are two problems that inhibit the optimization:
1. ARM backend outputs calculation of a PIC address as two instructions (load
GOT offset from constant pool and then load PIC address from GOT) and hoist
only handles expressions contained in a single_set().
2. Hoisting algorithm misses many opportunities for expression hoisting to
basic blocks that contain calculation of the expression. I.e., expr from bb4
will not be hoisted to bb2 even though it is trivially profitable:
bb2:
expr
condjump bb4
bb3:
<no expr>
jump bb5
bb4:
expr
bb5:
I'm testing patches to the ARM backend and code hoisting pass which fix the
above problems. The generated code calculates address of the global variable
only once:
goo:
push {r3, r4, r5, lr}
ldr r3, .L6
ldr r2, .L6+4
.LPIC0:
add r3, pc
ldr r5, [r3, r2]
mov r4, r0
ldr r3, [r5]
ldr r0, [r3]
cmp r0, #0
beq .L2
mov r1, r4
bl foo
.L2:
ldr r3, [r4]
mov r0, #0
cmp r3, #0
beq .L3
ldr r2, [r5]
cmp r3, r2
beq .L3
ldr r0, [r3]
.L3:
@ sp needed for prologue
pop {r3, r4, r5, pc}
.L7:
.align 2
.L6:
.word _GLOBAL_OFFSET_TABLE_-(.LPIC0+4)
.word gObj(GOT)
--
mkuvyrkov at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
AssignedTo|unassigned at gcc dot gnu |mkuvyrkov at gcc dot gnu dot
|dot org |org
Status|WAITING |ASSIGNED
Ever Confirmed|0 |1
Last reconfirmed|0000-00-00 00:00:00 |2010-06-08 10:41:43
date| |
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42495