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[Bug target/44278] New: Use ubfx to extract unsigned bit fields at the low end
- From: "carrot at google dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 26 May 2010 02:41:36 -0000
- Subject: [Bug target/44278] New: Use ubfx to extract unsigned bit fields at the low end
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
Compile the following code with options -march=armv7-a -mthumb -O2
unsigned int foo6(unsigned u)
{
return (u >> 0) & 0x1ff;
}
GCC generates:
lsls r0, r0, #23
lsrs r0, r0, #23
bx lr
The two shifts can be merged into
UBFX r1,r0,#0,#9
If I change the source code into
return (u >> 1) & 0x1ff;
Then gcc can generate ubfx instruction. So this case only occurs at the low end
of a register.
The same problem exists with option -Os and arm instructions.
--
Summary: Use ubfx to extract unsigned bit fields at the low end
Product: gcc
Version: 4.6.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: carrot at google dot com
GCC build triplet: i686-linux
GCC host triplet: i686-linux
GCC target triplet: arm-eabi
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44278