This is the mail archive of the
gcc-bugs@gcc.gnu.org
mailing list for the GCC project.
[Bug target/38900] ICE: unable to find a register to spill
- From: "ktietz at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 6 Jul 2009 16:41:33 -0000
- Subject: [Bug target/38900] ICE: unable to find a register to spill
- References: <bug-38900-16926@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #13 from ktietz at gcc dot gnu dot org 2009-07-06 16:41 -------
By simply re-ording of arguments fos sibcall_1 and sibcall_value_1, so that c
is last element, produced code is ok and no ICE I've seen. The ebx issue is
pretty wrong here.
Index: gcc/gcc/config/i386/i386.md
===================================================================
--- gcc.orig/gcc/config/i386/i386.md 2009-07-06 18:14:36.155670000 +0200
+++ gcc/gcc/config/i386/i386.md 2009-07-06 18:36:54.453670100 +0200
@@ -15536,7 +15536,7 @@
[(set_attr "type" "call")])
(define_insn "*sibcall_1"
- [(call (mem:QI (match_operand:SI 0 "sibcall_insn_operand" "s,c,d,a"))
+ [(call (mem:QI (match_operand:SI 0 "sibcall_insn_operand" "s,d,a,c"))
(match_operand 1 "" ""))]
"SIBLING_CALL_P (insn) && !TARGET_64BIT"
{
@@ -22183,7 +22183,7 @@
(define_insn "*sibcall_value_1"
[(set (match_operand 0 "" "")
- (call (mem:QI (match_operand:SI 1 "sibcall_insn_operand" "s,c,d,a"))
+ (call (mem:QI (match_operand:SI 1 "sibcall_insn_operand" "s,d,a,c"))
(match_operand:SI 2 "" "")))]
"SIBLING_CALL_P (insn) && !TARGET_64BIT"
{
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38900