This is the mail archive of the gcc-bugs@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug target/40457] use stm and ldm to access consecutive memory words



------- Comment #7 from carrot at google dot com  2009-06-17 09:30 -------
My command line option is -O2 -Os -mthumb

The compiler didn't run into load_multiple_sequence and
store_multiple_sequence. The peephole rules specified it applies to TARGET_ARM
only. Is there any special reason we didn't enable it in thumb mode?

For the ascending register number, do we have any code to rename a set of
registers to make them ascending? In the generated code for the second
function, the register numbers have different order compared with memory
offsets.

ldr     r2, [r0, #4]
ldr     r3, [r0]


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40457


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]