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[Bug target/40266] march-native gives -mno-sse4, but cpuinfo sse4_1
- From: "seandarcy2 at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 27 May 2009 15:10:37 -0000
- Subject: [Bug target/40266] march-native gives -mno-sse4, but cpuinfo sse4_1
- References: <bug-40266-12063@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #6 from seandarcy2 at gmail dot com 2009-05-27 15:10 -------
(In reply to comment #1)
> (In reply to comment #0)
>
> > cat /proc/cpuinfo:
> >
> > flags : .....sse sse2 .... ssse3 .... sse4_1 ...
>
> Please post complete /proc/cpuinfo.
>
It's quad-core, so here's just 0 cpu:
[root@intel64-office ffmpeg]# cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 23
model name : Intel(R) Core(TM)2 Quad CPU Q8300 @ 2.50GHz
stepping : 10
cpu MHz : 2003.000
cache size : 2048 KB
physical id : 0
siblings : 4
core id : 0
cpu cores : 4
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat
pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm
constant_tsc arch_perfmon pebs bts rep_good pni dtes64 monitor ds_cpl est tm2
ssse3 cx16 xtpr pdcm sse4_1 xsave lahf_lm
bogomips : 6000.06
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40266