[Bug inline-asm/37887] New: %sil and %dil are used in 32-bit mode as inline asm registers

["therealfroggey at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>]

When compiling in 32-bit mode using the "r", "S" or "D" asm constraint with a
char variable gcc will incorrectly emit %sil or %dil

/* uses %sil for e */
void func(int a, int b, int c, int d, char e)
{
        __asm__ volatile("%0 %1 %2 %3 %4" :: "r"(a), "r"(b), "r"(c), "r"(d),
"r"(e));
}

void func(char c)
{
        __asm__ volatile("%0" :: "S"(c));
}

This occurs with gcc version 4.4.0 20081021 (experimental) svn revision 141272
and gcc version 4.3.2 (Debian 4.3.2-1)

Command line options used: -O2 -m32 -S


-- 
           Summary: %sil and %dil are used in 32-bit mode as inline asm
                    registers
           Product: gcc
           Version: 4.4.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: inline-asm
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: therealfroggey at gmail dot com
 GCC build triplet: x86_64-linux-gnu
  GCC host triplet: x86_64-linux-gnu
GCC target triplet: x86_64-linux-gnu


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37887