[Bug rtl-optimization/37514] [4.4 Regression] Wrong code generated for 20021120-1.c with -O3 -fomit-frame-pointer on sh4

["kkojima at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>]

------- Comment #2 from kkojima at gcc dot gnu dot org  2008-09-14 00:38 -------
Here is the problematic part of the generated code:

        mov.w   .L240,r7
        add     #4,r1
        mov.w   .L241,r6
        add     #4,r3
        add     r15,r7
        fmov.s  @r7,fr14
        add     r15,r6
        add     #4,r14
        mov.l   .L242,r7
        fmov.s  fr14,@r2
        add     #4,r13
        fmov.s  @r6,fr14
        add     #4,r12
        add     #4,r11
        mov.l   .L243,r6
        fmov.s  fr14,@r2
        ...
.L240:
        .short  368
.L241:
        .short  364

where r2 is set to &gf[0].   Thus the float value in [r15+368]
is written to gf[0] and then the float value in [r15+364] is
stored to gf[0] again.  The corresponding rtl dump in .sched1
is:

(insn:HI 828 826 832 6 xxx.c:42 (parallel [
            (set (mem/s/v:SF (reg/f:SI 434) [3 gf+0 S4 A32])
                (reg/v:SF 289 [ f00 ]))
            (use (reg/v:PSI 151 ))
            (clobber (scratch:SI))
        ]) 205 {movsf_ie} (expr_list:REG_DEAD (reg/f:SI 434)
        (expr_list:REG_DEAD (reg/v:SF 289 [ f00 ])
            (nil))))

(insn:HI 832 828 836 6 xxx.c:42 (parallel [
            (set (mem/s/v:SF (reg/f:SI 551) [3 gf+4 S4 A32])
                (reg/v:SF 288 [ f10 ]))
            (use (reg/v:PSI 151 ))
            (clobber (scratch:SI))
        ]) 205 {movsf_ie} (expr_list:REG_DEAD (reg/f:SI 551)
        (expr_list:REG_DEAD (reg/v:SF 288 [ f10 ])
            (nil))))

which looks to be right.  OTOH that in .ira is:

(insn 2024 826 2025 5 xxx.c:42 (set (reg:SI 7 r7)
        (const_int 368 [0x170])) 175 {movsi_ie} (nil))

(insn 2025 2024 2026 5 xxx.c:42 (set (reg:SI 7 r7)
        (plus:SI (reg:SI 7 r7)
            (reg/f:SI 15 r15))) 35 {*addsi3_compact} (expr_list:REG_EQUIV
(plus:SI (reg/f:SI 15 r15)
            (const_int 368 [0x170]))
        (nil)))

(insn 2026 2025 828 5 xxx.c:42 (parallel [
            (set (reg:SF 78 fr14)
                (mem/c:SF (reg:SI 7 r7) [7 f00+0 S4 A32]))
            (use (reg/v:PSI 151 ))
            (clobber (scratch:SI))
        ]) 205 {movsf_ie} (nil))

(insn:HI 828 2026 2028 5 xxx.c:42 (parallel [
            (set (mem/s/v:SF (reg/f:SI 2 r2 [434]) [3 gf+0 S4 A32])
                (reg:SF 78 fr14))
            (use (reg/v:PSI 151 ))
            (clobber (scratch:SI))
        ]) 205 {movsf_ie} (nil))

(insn 2028 828 2029 5 xxx.c:42 (set (reg:SI 6 r6)
        (const_int 364 [0x16c])) 175 {movsi_ie} (nil))

(insn 2029 2028 2030 5 xxx.c:42 (set (reg:SI 6 r6)
        (plus:SI (reg:SI 6 r6)
            (reg/f:SI 15 r15))) 35 {*addsi3_compact} (expr_list:REG_EQUIV
(plus:SI (reg/f:SI 15 r15)
            (const_int 364 [0x16c]))
        (nil)))

(insn 2030 2029 832 5 xxx.c:42 (parallel [
            (set (reg:SF 78 fr14)
                (mem/c:SF (reg:SI 6 r6) [8 f10+0 S4 A32]))
            (use (reg/v:PSI 151 ))
            (clobber (scratch:SI))
        ]) 205 {movsf_ie} (nil))

(insn:HI 832 2030 2033 5 xxx.c:42 (parallel [
            (set (mem/s/v:SF (reg/f:SI 2 r2 [434]) [3 gf+4 S4 A32])
                (reg:SF 78 fr14))
            (use (reg/v:PSI 151 ))
            (clobber (scratch:SI))
        ]) 205 {movsf_ie} (nil))

which shows that IRA uses r434 both for gf+0 and gf+4.
I've confirmed that the error goes away with -fno-ira-share-spill-slots.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37514