[Bug c/33949] New: gcc-4.2.2 generates bad code on ARM

["zero at colonel-panic dot org" <gcc-bugzilla at gcc dot gnu dot org>]

GCC generates incorrect code for the following C code in both ARM and Thumb
modes. The initialisation of param[0] is performed in the wrong leg of the if()
statement, consequently the assignemnt to DMA_ADDR_REG uses an uninitialised
value. Command line, compiler specs and object dump are included below.

I quickly tested 4.1.2 and 4.2.0 and they exhibit the same problem.

#define DMA_ADDR_REG            (*(unsigned volatile *) 0xffff1000)

extern void panic(void);

static void inner_func(void *data, unsigned size)
{
        if (!size)
                panic();
        else
                DMA_ADDR_REG = (unsigned long) data;
}

void outer_func(unsigned offset, unsigned size)
{
        unsigned char param[1];

        param[0] = offset;

        inner_func(param, size);
}

/*
 * gcc -Wall -O2 -fno-strict-aliasing
 *

bug.o:     file format elf32-littlearm

Disassembly of section .text:

00000000 <outer_func>:
   0:   b500            push    {lr}
   2:   b081            sub     sp, #4
   4:   2900            cmp     r1, #0
   6:   d005            beq.n   14 <outer_func+0x14>
   8:   466a            mov     r2, sp
   a:   4b05            ldr     r3, [pc, #20]   (20 <.text+0x20>)
   c:   3203            adds    r2, #3
   e:   601a            str     r2, [r3, #0]
  10:   b001            add     sp, #4
  12:   bd00            pop     {pc}
  14:   466b            mov     r3, sp
  16:   3303            adds    r3, #3
  18:   7018            strb    r0, [r3, #0]
  1a:   f7ff fffe       bl      0 <panic>
  1e:   e7f7            b.n     10 <panic+0x10>
  20:   1000            asrs    r0, r0, #32
  22:   Address 0x00000022 is out of bounds.

 *
 * gcc -Wall -O2 -fno-strict-aliasing -mthumb
 *

bug.o:     file format elf32-littlearm

Disassembly of section .text:

00000000 <outer_func>:
   0:   e52de004        str     lr, [sp, #-4]!
   4:   e3510000        cmp     r1, #0  ; 0x0
   8:   e24dd004        sub     sp, sp, #4      ; 0x4
   c:   128d2003        addne   r2, sp, #3      ; 0x3
  10:   13e03a0e        mvnne   r3, #57344      ; 0xe000
  14:   15032fff        strne   r2, [r3, #-4095]
  18:   0a000001        beq     24 <outer_func+0x24>
  1c:   e28dd004        add     sp, sp, #4      ; 0x4
  20:   e8bd8000        ldmia   sp!, {pc}
  24:   e5cd0003        strb    r0, [sp, #3]
  28:   ebfffffe        bl      0 <panic>
  2c:   eafffffa        b       1c <panic+0x1c>

 *
 * gcc -v
 *

Using built-in specs.
Target: arm-unknown-elf
Configured with: ../configure --target=arm-unknown-elf --prefix=/usr
--disable-nls --disable-shared --disable-threads --with-gnu-as --with-gnu-ld
--enable-multilib --disable-win32-registry --enable-sjlj-exceptions
--with-newlib --enable-__cxa_exit --enable-languages=c
--with-gxx-include-dir=/usr/arm-unknown-elf/include/c++
Thread model: single
gcc version 4.2.2

 */


-- 
           Summary: gcc-4.2.2 generates bad code on ARM
           Product: gcc
           Version: 4.2.2
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: zero at colonel-panic dot org
 GCC build triplet: i686-pc-linux-gnu
  GCC host triplet: i686-pc-linux-gnu
GCC target triplet: arm-unknown-elf


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33949