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[Bug target/32961] [4.2/4.3 Regression]: Gcc has different requirements for x86 shift xmm intrinsics
- From: "hjl at lucon dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 18 Oct 2007 13:44:20 -0000
- Subject: [Bug target/32961] [4.2/4.3 Regression]: Gcc has different requirements for x86 shift xmm intrinsics
- References: <bug-32961-14931@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #12 from hjl at lucon dot org 2007-10-18 13:44 -------
(In reply to comment #8)
> (In reply to comment #7)
> > Icc generates:
> > 0: 66 0f 6e cf movd %edi,%xmm1
> > 4: 66 0f f2 c1 pslld %xmm1,%xmm0
>
> Right, that's what icc's documentation would suggest. But that documentation
> seems inconsistent with the assembly reference guide. It may be that the
> assembly reference guide is the one that's wrong, or that icc intentionally
> extends it.
>
There is nothing wrong with IA32 SDM. One intrinsic does map to one
assembly instruction, but not necessarily the same instruction every
time. Another example is _mm_cmpistrm and its friends.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32961