[Bug libgcj/33479] SyncTest Intermittent failing on MIPS

["daney at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>]

------- Comment #3 from daney at gcc dot gnu dot org  2007-09-18 23:35 -------
The LOCKED bit is set.  All the other fields in the hash entry are zero.

I think adding a memory barrier at the end of compare_and_swap fixes the
problem.

Currently I have:

inline static bool
compare_and_swap(volatile obj_addr_t *addr,
                 obj_addr_t old,
                 obj_addr_t new_val)
{
  bool b = __sync_bool_compare_and_swap(addr, old, new_val);
  __sync_synchronize();
  return b;
}

inline static bool
compare_and_swap_release(volatile obj_addr_t *addr,
                         obj_addr_t old,
                         obj_addr_t new_val)
{
  return __sync_bool_compare_and_swap(addr, old, new_val);
}

I would have thought that the 'sc' instruction emitted by
__sync_bool_compare_and_swap made the swap visible to other CPUs, but it
appears that the 'sync' emitted by __sync_synchronize() is required.  Hmm.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33479