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[Bug target/30970] Register zeroing by xor N,N should be moved out of loop
- From: "uros at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 27 Feb 2007 21:27:38 -0000
- Subject: [Bug target/30970] Register zeroing by xor N,N should be moved out of loop
- References: <bug-30970-1649@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #4 from uros at gcc dot gnu dot org 2007-02-27 21:27 -------
Subject: Bug 30970
Author: uros
Date: Tue Feb 27 21:27:27 2007
New Revision: 122387
URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=122387
Log:
PR target/30970
* config/i386/sse.md (*mov<mode>_internal, *movv4sf_internal,
*movv2df_internal): Enable pattern only for valid operand
combinations.
* config/i386/i386.c (ix86_modes_tieable_p): For SSE registers,
tie only 128bit modes. For MMX registers, tie only 64bit modes.
testsuite/ChangeLog:
PR target/30970
* gcc.target/i386/gfortran.dg/pr30970.c: New test.
Added:
trunk/gcc/testsuite/gcc.target/i386/pr30970.c
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/i386.c
trunk/gcc/config/i386/sse.md
trunk/gcc/testsuite/ChangeLog
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=30970