This is the mail archive of the gcc-bugs@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug target/27619] wrong code for mixed-mode division with -mpowerpc64 -O1



------- Comment #10 from janis at gcc dot gnu dot org  2006-05-16 18:26 -------
By the way, I found this by running SPEC CPU2000, FreePOOMA, FTensor, and
Blitz++ with several sets of options plus either "-m32", "-m64", or "-m32
-mpowerpc64" and this was the only failure I saw.  This failure happens
consistently.  It seems as if a kernel issue would affect additional tests.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27619


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]