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[Bug middle-end/22275] [3.4/4.0/4.1/4.2 Regression] bitfield layout change (regression?)



------- Comment #20 from steven at gcc dot gnu dot org  2006-01-14 15:35 -------
Indeed, in GCC 3.2 ("GNU C version 3.2.3 (x86_64-unknown-linux-gnu)") initially
we have a DECL_ALIGN of 64 bits for the zero-length bitfield when we enter
field_decl:

Breakpoint 2, place_field (rli=0xa15b30, field=0x2aaaaab34820) at
stor-layout.c:727
727       tree type = TREE_TYPE (field);
1: debug_tree (field) =  <field_decl 0x2aaaaab34820
    type <integer_type 0x2aaaaaae7750 unsigned int unsigned SI
        size <integer_cst 0x2aaaaaae58d0 constant 32>
        unit size <integer_cst 0x2aaaaaae5a20 constant 4>
        align 32 symtab 0 alias set -1 precision 32 min <integer_cst
0x2aaaaaae5ab0 0> max <integer_cst 0x2aaaaaae5ae0 4294967295>>
    bit-field nonaddressable decl_4 VOID file t.c line 6
    size <integer_cst 0x2aaaaaaee870 type <integer_type 0x2aaaaaaf09c0
bit_size_type> constant 0>
    align 64 offset_align 1 context <record_type 0x2aaaaab349c0> chain
<field_decl 0x2aaaaab348f0 fMenuEnumFilter>>
void
(gdb) undisp 1
(gdb) p field->decl.u1.a.align
$1 = 64
(gdb)    

We go on to layout_decl then with the following parameters:

775       layout_decl (field, known_align);
(gdb) p known_align
$2 = 16
(gdb) p desired_align
$3 = 64
(gdb) p user_align
$4 = 0
(gdb) next
776       if (! DECL_PACKED (field))
(gdb) p field->decl.u1.a.align
$5 = 8

So layout_decl has overruled the desired alignment of the field from 64 bits to
8 bits.  Then we later on change the desired alignment again:

799       if ((* targetm.ms_bitfield_layout_p) (rli->t)
(gdb)
817       if (PCC_BITFIELD_TYPE_MATTERS && type != error_mark_node
(gdb)
826           if (! integer_zerop (DECL_SIZE (field)))
(gdb)
828           else if (! DECL_PACKED (field))
(gdb)
829             desired_align = TYPE_ALIGN (type);
(gdb)
833           if (DECL_NAME (field) != 0)
(gdb) p desired_align
$8 = 32

Then we change the rli->bitpos to match the latest desire_align on lines
880-908 and we lay out the next field on the 32th bit in the record.

In other words, it looks like effectively the pre-3.4 ABI for AMD64
accidentally updated the alignment to 32 bits (instead of 64 as requested).  To
return to the pre-3.4 ABI, we also need target changes to recognize zero-length
bit fields and make EMPTY_FIELD_BOUNDARY return 32 bits for them.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22275


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