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[Bug target/16176] Miscompilation of unaligned data in MIPS backend (SB1 flavor)
- From: "pkoning at equallogic dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 24 Jun 2004 15:42:32 -0000
- Subject: [Bug target/16176] Miscompilation of unaligned data in MIPS backend (SB1 flavor)
- References: <20040624153824.16176.pkoning@equallogic.com>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From pkoning at equallogic dot com 2004-06-24 15:42 -------
The processor selection doesn't actually matter; I tried the compile with
march/mtune set to sr71000, r5000, rm9000, and r4000; all generate the same
broken code.
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=16176