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[Bug target/15340] [3.3/3.4/3.5 Regression] GCC internal error in preprocessed C code
- From: "roger at eyesopen dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 22 Jun 2004 12:47:34 -0000
- Subject: [Bug target/15340] [3.3/3.4/3.5 Regression] GCC internal error in preprocessed C code
- References: <20040507195626.15340.dawalker@uiuc.edu>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From roger at eyesopen dot com 2004-06-22 12:47 -------
This looks to be a bug in reload, or a problem with the x86 backend's constraint
matching.
In .19.life, we have
(insn 38 33 39 2 (set (reg:QI 84)
(mem/s:QI (plus:SI (reg/f:SI 93)
(reg/f:SI 93)) [0 dir S1 A8])) 46 {*movqi_1} (nil)
(nil))
(insn 39 38 42 2 (set (reg/v:SI 63 [ y ])
(sign_extend:SI (reg:QI 84))) 86 {extendqisi2} (insn_list 38 (nil))
(expr_list:REG_DEAD (reg:QI 84)
(nil)))
These get smushed in combine, but I believe are stiil valid in .20.combine
(insn 39 38 42 2 (set (reg/v:SI 63 [ y ])
(sign_extend:SI (mem/s:QI (mult:SI (reg/f:SI 93)
(const_int 2 [0x2])) [0 dir S1 A8]))) 86 {extendqisi2} (nil)
(nil))
But everything goes to hell in reload, as we consider substituting pseduo 93
for "(plus (reg/f:SI bp) (const_int -13))", producing this monster in .26.greg
Reloads for insn # 39
Reload 0: reload_in (QI) = (mem/s:QI (mult:SI (plus:SI (reg/f:SI 6 bp)
(const_int -13 [0xfffffff3])) (const_int 2 [0x2])) [0 dir S1 A8])
Q_REGS, RELOAD_FOR_INPUT (opnum = 1), optional
reload_in_reg: (mem/s:QI (mult:SI (plus:SI (reg/f:SI 6 bp)
(const_int -13 [0xfffffff3])) (const_int 2 [0x2])) [0 dir S1 A8])
(insn:HI 39 38 42 2 (set (reg/v:SI 3 bx [orig:63 y ] [63])
(sign_extend:SI (mem/s:QI (mult:SI (plus:SI (reg/f:SI 6 bp)
(const_int -13 [0xfffffff3]))
(const_int 2 [0x2])) [0 dir S1 A8]))) 86 {extendqisi2} (nil)
(nil))
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=15340