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target/9347: BCLR Instruction is not being generated


>Number:         9347
>Category:       target
>Synopsis:       BCLR Instruction is not being generated
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    unassigned
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Fri Jan 17 01:26:00 PST 2003
>Closed-Date:
>Last-Modified:
>Originator:     aratid@kpit.com
>Release:        latest gcc snapshot gcc-20030113
>Organization:
>Environment:
Win 2000
H8300S
>Description:
The BCLR instruction does not get generated for current CVS head. 

>How-To-Repeat:
Test program

#if __H8300S__
#define PBIT   (*(char *)0xFFFFFFA0) /* FLASH Address*/
#define PINT   (*(int *)0xFFFF80A0) /* FLASH Address*/
#define PLONG   (*(long int *)0xFFFF80A0) /* FLASH Address*/
#elif __H8300H__
#define PBIT   (*(char *)0xFFFFA0) /* FLASH Address*/
#define PINT   (*(int *)0xFF80A0) /* FLASH Address*/
#define PLONG   (*(long int *)0xFF80A0) /* FLASH Address*/
#else
#define PBIT   (*(char *)0xFFA0) /* FLASH Address*/
#define PINT   (*(int *)0xFF80) /* FLASH Address*/
#define PLONG   (*(long int *)0xFF80) /* FLASH Address*/
#endif

void foo()
{
	PBIT |= 0x40 ;
	PBIT &= 0xFB ;
}

h8300-coff-gcc -S -ms h8test.c

results in following h8test.s

;	GCC For the Hitachi H8/300
;	By Hitachi America Ltd and Cygnus Support

	.h8300s
	.file	"h8test.c"
	.section .text
	.align 1
	.global _foo
_foo:
	mov.l	er6,@-er7
	mov.l	er7,er6
	bset	#6,@-96:8
	mov.b	#-5,r2l
	mov.b	@-96:8,r3l
	and	r3l,r2l
	mov.b	r2l,@-96:8
	mov.l	@er7+,er6
	rts
	.end
	.ident	"GCC: (GNU) 3.3 20030113 (prerelease)"


>Fix:
No idea.

This happens because the foll. condition fails in single_zero_operand operand[2] (h8300.c)
if (GET_CODE (operand) == CONST_INT)
The GET_CODE returns REG instead of CONST_INT. I could trace this down to foll. code in expr.c

case INTEGER_CST:
      temp = immed_double_const (TREE_INT_CST_LOW (exp),
				 TREE_INT_CST_HIGH (exp), mode);

      /* ??? If overflow is set, fold will have done an incomplete job,
	 which can result in (plus xx (const_int 0)), which can get
	 simplified by validate_replace_rtx during virtual register
	 instantiation, which can result in unrecognizable insns.
	 Avoid this by forcing all overflows into registers.  */
	 
      if (TREE_CONSTANT_OVERFLOW (exp)
	  && modifier != EXPAND_INITIALIZER)
	temp = force_reg (mode, temp);
  
      return temp;

Here, exp->common.static_flag, exp->common.public_flag and exp->common.const_flag are set to 1.
This causes the if loop to be entered.
	
Hope this helps.

Regards,
Arati Dikey

>Release-Note:
>Audit-Trail:
>Unformatted:


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