Re: target/2246: Code generated for IA64 doesn't reset NaT bit on scratch reg

[amacleod at simba dot cygnus dot com]

If expand_return is handling a return of a structure in registers, it sets 
the structure a bitfield at a time. It issues a register clobber for each 
register it uses before it starts setting values. On ia64, we don't know 
where this register came from, and its possible that the NaT bit could be set.
This will result in the NaT bit being incorrectly propagated.

If we set the register to 0 instead of clobbering it, this behaviour goes
away. So far I haven't seen the code get any worse. The set to 0 and the
first bitfield set tends to be optimized into a single set, resulting in no
additional instructions.


Is this OK to apply to mainline? (and maybe 3.0?) It bootstraps on both
ia64 and x86, and introduces no new failures in c-torture.

Andrew

PS  btw, this is PR target/2246.

	* stmt.c (expand_return): Clear dest instead of clobbering it when
	setting a return value via bitsets.


Index: stmt.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/stmt.c,v
retrieving revision 1.214
diff -c -p -r1.214 stmt.c
*** stmt.c	2001/08/27 17:36:20	1.214
--- stmt.c	2001/10/12 14:14:37
*************** expand_return (retval)
*** 3066,3073 ****
  	      dst = gen_reg_rtx (word_mode);
  	      result_pseudos[xbitpos / BITS_PER_WORD] = dst;
  
! 	      /* Clobber the destination before we move anything into it.  */
! 	      emit_insn (gen_rtx_CLOBBER (VOIDmode, dst));
  	    }
  
  	  /* We need a new source operand each time bitpos is on a word
--- 3066,3074 ----
  	      dst = gen_reg_rtx (word_mode);
  	      result_pseudos[xbitpos / BITS_PER_WORD] = dst;
  
! 	      /* Clear the destination before we move anything into it.  */
! 	      emit_insn (gen_rtx_SET (VOIDmode, dst, 
! 				      CONST0_RTX (GET_MODE (dst))));
  	    }
  
  	  /* We need a new source operand each time bitpos is on a word