This is the mail archive of the gcc-bugs@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

Re: SH-ELF: SFmode calling convention bug with -m4/-m4-single-only -ml


> 
> > The culprit appears to be the FUNCTION_ARG macro in gcc/config/sh/sh.h.
> > It flips the least significant bit of the regno to which the parameter
> > is assigned if the options are -m4/-m4-single and -ml.
> 
> This bit flipping is necessary because DFmode values are always big endian
> in registers, but in little endian mode they are little endian in memory.
> So when a varargs function stores the floating point registers, it stores
> fr5 first in memory, then fr4, then fr7, then fr6 etc.
> If you wanted to use the fp registers in numerical order for SFmode in
> little endian mode, you'd need larger and slower code in the va_arg
> processing.

This really should be fixed because:

1) It deviates significantly from the SH4 ABI established by Hitachi

2) People shouldn't be using varargs/stdargs for speed-critical code.

3) It makes thunking between different compiler options extremely difficult.
   Currently, we're attempting to call from -m4-single-only to -m4 code
   (using no doubles in parametesr). This should be a simple flip of some
   FPSCR bits; however with the current situation, it rqeuires swapping
   FR4/FR5, FR6/FR7, FR8/FR9, FR10/FR11 as well depending on the function.

But mainly, it's #1...

> -- 
> Joern Rennecke                  |            gcc expert for hire
> amylaar@onetel.net.uk           |  send enquiries to: jwr_jobs@onetel.net.uk

Toshi


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]