This is the mail archive of the gcc-bugs@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

ARM codegen bug



Here's what's going on, one level further down.

We have:

  (insn 2172 2171 2173 (set (reg:CC 24 cc)
	  (compare:CC (reg:SI 522)
	      (const_int 0 [0x0]))) -1 (nil)
      (nil))

  (jump_insn 2173 2172 3928 (set (pc)
	  (if_then_else (eq (reg:CC 24 cc)
		  (const_int 0 [0x0]))
	      (label_ref 2209)
	      (pc))) -1 (nil)
      (nil))

We're assuming the branch is taken, and trying to figure out what we
can infer from that.

So, in record_jump_equiv, we call:

  code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);

Here, CODE is `EQ', OP0 is `(reg:CC 24 cc)' and OP1 is `(const_int
0)'.

After the call, we get CODE set to `EQ', OP0 set to `(reg:SI 522)' and
OP1 set to `(const_int 0)'.

That's wrong; we've inverted the sense of the condition.  Before, we
had:

  (reg522 == 0) == 0

Now, we have:

  (reg522 == 0)

So, the bug is in find_comparison_args.  I hope to have a patch soon.

Does my analysis sound right?

Thanks,

--
Mark Mitchell                   mark@codesourcery.com
CodeSourcery, LLC               http://www.codesourcery.com


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]