Re: Combine error?

[Richard Earnshaw <rearnsha at arm dot com>]

> Having combine work on SSA form might provide the functionality we need --
> r2 in i2 would be renamed to a new register which removes the problamtic
> dependency between i1 and i2.

Yes, that should handle this case, though at the possible expense of 
increasing register pressure.  I'm not sure if there are other cases that 
we are missing that might need other approaches; for example if memory 
references are involved (this is probably more of an issue on a CISC 
architecture than a RISC of course, since most RISCs are load-store).  
This is good news since it means that combine's algorithm won't need 
changing to take advantage of this optimization.

An interesting corollary of transforming to SSA form is that we won't see 
the log_links to a deleted insn either (I'm assuming SSA is generated 
before flow runs), since the insns killed by generating post-inc/dec will 
instead contain a copy from the incremented insn to the new target.

> 
>   > Which of course, leads to a possible solution to our problem of updating 
[...]

> Interesting.  However, don't you have to go find any LOG_LINK that points
> to i1 and redirect it to i2?  Consider the next user of the value in r1.

Argh! You are quite correct.  It is also the case that the LOG_LINK that 
we keep by this method is of little use to combine since it is now not an 
insn src setter (so combine can't substitute for it).

I'll see if I can think of an efficient way of tracking down a dead link 
from within flow when we create the anomaly.

R.