Re: PowerPC reusing CTR register for nested loops

[Jeffrey A Law <law at cygnus dot com>]

  In message <9809110456.AA49978@marc.watson.ibm.com>you write:
  > 	The PowerPC target has not been using the CTR register for loops.
  > This is caused by a special optimization that Haifa added which never is
  > enabled for any optimization level.  Enabling it causes a bootstrap
  > failure which I have been trying to track down.
  > 
  > 	What appears to be happening is the CTR register is used for two
  > nested loops making the count for the outer loop invalid.
  > 
  > 	loop.c:scan_loop is called for each loop from the inside loop
  > outward.  When the CTR register optimization finds a loop that can utilize
  > the CTR regsiter, it walks up loop_outer_loop[] vector marking the outer
  > loops with a CTR busy flag.
  > 
  > 	Looking at the loop phase output, the optimization is finding loop
  > 10 can use the register, then loop 9 can use the register.  It clearly is
  > searching the loops from highest number to lowest -- inner to outer.  But
  > the assembly shows two nested loops using the CTR register:
Could be that we run loop opts twice now.  That's the only thing that
immediately comes to mind.

I've actually got a significant cleanup of that code lying around
here somewhere that I should dig out, finish off, test and install.


I don't think it actually fixed any bugs, but it did make the code
a little easier to read, less ppc specific and put in some of the
framework for allowing other processors to take advantage of this code
(many of the chips targetted towards the embedded market have looping
insns with many of the same features/limitations as the bct insns on
the rs6000/powerpc).



jeff