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RE: [PATCH] boehm gc support for CRIS
- From: Simon Posnjak <simon dot posnjak at cetrtapot dot si>
- To: "Boehm, Hans" <hans dot boehm at hp dot com>
- Cc: Hans-Peter Nilsson <hans-peter dot nilsson at axis dot com>,tromey at redhat dot com, rmathew at gmail dot com, green at redhat dot com,java-patches at gcc dot gnu dot org
- Date: Fri, 29 Oct 2004 10:00:04 +0200
- Subject: RE: [PATCH] boehm gc support for CRIS
- Organization: Četrta pot
- References: <94505C6A90226146BD46E87646B4402F4A9107@cacexc11.americas.cpqcorp.net>
V Äet, 28.10.2004 ob 21:08 je Boehm, Hans napisal(a):
> In that case, I'm basically fine with the patch.
>
> Simon - Can you resubmit the patch with the small change from
> CRIS32 to CRIS? That will reduce the chance of a misapplication
> on my part, or divergence between the gcc and my trees.
Attached.
[This patch is against Hans's tree but should also cleanly apply to gcc
tree.]
Regards Simon
diff -uNpr gc6.3/include/private/gc_locks.h gc6.3_cris/include/private/gc_locks.h
--- gc6.3/include/private/gc_locks.h 2003-08-27 19:00:26.000000000 +0200
+++ gc6.3_cris/include/private/gc_locks.h 2004-10-29 09:31:16.823120024 +0200
@@ -231,6 +231,28 @@
}
# define GC_TEST_AND_SET_DEFINED
# endif /* ARM32 */
+# ifdef CRIS
+ inline static int GC_test_and_set(volatile unsigned int *addr) {
+ /* Riped from linuxthreads/sysdeps/cris/pt-machine.h
+ */
+ register unsigned long int ret;
+
+ /* Note the use of a dummy output of *spinlock to expose the write. The
+ memory barrier is to stop *other* writes being moved past this code. */
+ __asm__ __volatile__("clearf\n"
+ "0:\n\t"
+ "movu.b [%2],%0\n\t"
+ "ax\n\t"
+ "move.b %3,[%2]\n\t"
+ "bwf 0b\n\t"
+ "clearf"
+ : "=&r" (ret), "=m" (*addr)
+ : "r" (addr), "r" ((int) 1), "m" (*addr)
+ : "memory");
+ return ret;
+ }
+# define GC_TEST_AND_SET_DEFINED
+# endif /* CRIS */
# ifdef S390
inline static int GC_test_and_set(volatile unsigned int *addr) {
int ret;
diff -uNpr gc6.3/include/private/gcconfig.h gc6.3_cris/include/private/gcconfig.h
--- gc6.3/include/private/gcconfig.h 2004-05-06 01:10:54.000000000 +0200
+++ gc6.3_cris/include/private/gcconfig.h 2004-10-29 09:33:49.826859920 +0200
@@ -232,6 +232,12 @@
# define ARM32
# define mach_type_known
# endif
+# if defined(LINUX) && defined(__cris__)
+# ifndef CRIS
+# define CRIS
+# endif
+# define mach_type_known
+# endif
# if defined(LINUX) && (defined(powerpc) || defined(__powerpc__) || defined(powerpc64) || defined(__powerpc64__))
# define POWERPC
# define mach_type_known
@@ -474,6 +480,7 @@
/* POWERPC ==> IBM/Apple PowerPC */
/* (MACOS(<=9),DARWIN(incl.MACOSX),*/
/* LINUX, NETBSD, NOSYS variants) */
+ /* CRIS ==> Axis Etrax */
/*
@@ -1795,6 +1802,19 @@
# endif
#endif
+# ifdef CRIS
+# define MACH_TYPE "CRIS"
+# define CPP_WORDSZ 32
+# define ALIGNMENT 1
+# define OS_TYPE "LINUX"
+# define DYNAMIC_LOADING
+# define LINUX_STACKBOTTOM
+# define USE_GENERIC_PUSH_REGS
+# define SEARCH_FOR_DATA_START
+ extern int _end[];
+# define DATAEND (_end)
+# endif
+
# ifdef SH
# define MACH_TYPE "SH"
# define ALIGNMENT 4
@@ -2043,7 +2063,7 @@
# endif
# if defined(HP_PA) || defined(M88K) || defined(POWERPC) && !defined(DARWIN) \
- || defined(LINT) || defined(MSWINCE) || defined(ARM32) \
+ || defined(LINT) || defined(MSWINCE) || defined(ARM32) || defined(CRIS) \
|| (defined(I386) && defined(__LCC__))
/* Use setjmp based hack to mark from callee-save registers. */
/* The define should move to the individual platform */
diff -uNpr gc6.3/os_dep.c gc6.3_cris/os_dep.c
--- gc6.3/os_dep.c 2004-07-07 21:16:28.000000000 +0200
+++ gc6.3_cris/os_dep.c 2004-10-29 09:31:45.416773128 +0200
@@ -2510,7 +2510,11 @@ SIG_PF GC_old_segv_handler; /* Also old
# if defined(ARM32)
char * addr = (char *)sc.fault_address;
# else
- --> architecture not supported
+# if defined(CRIS)
+ char * addr = (char *)sc.regs.csraddr;
+# else
+ --> architecture not supported
+# endif
# endif
# endif
# endif