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3.4 PATCH: Consistently use _ABIO32 for _MIPS_SIM
- From: Rainer Orth <ro at TechFak dot Uni-Bielefeld dot DE>
- To: gcc-patches at gcc dot gnu dot org
- Cc: libstdc++ at gcc dot gnu dot org, java-patches at gcc dot gnu dot org, Hans Boehm <hans_boehm at hp dot com>, David Daney <ddaney at avtrex dot com>, Eric Christopher <echristo at redhat dot com>
- Date: Wed, 8 Oct 2003 14:35:27 +0200 (MEST)
- Subject: 3.4 PATCH: Consistently use _ABIO32 for _MIPS_SIM
As David pointed out, my libffi patch
http://gcc.gnu.org/ml/gcc-patches/2003-10/msg00412.html
broke bootstrap for mipsisa32el-linux (or in fact for all mips*-*-{irix,
linux}* platforms):
http://gcc.gnu.org/ml/gcc-patches/2003-10/msg00566.html
As described in
http://gcc.gnu.org/ml/gcc-patches/2003-10/msg00599.html
the mips port should consistently define and use _ABIO32 for _MIPS_SIM
instead of relying on an external definition of _MIPS_SIM_ABI32, which is
only present in <sgidefs.h>. The following patch does this all over the
tree.
I'll better fire off another full bootstrap on mips-sgi-irix6.5; perhaps
someone else could do the same on some MIPS/Linux system to make extra sure
this doesn't break anything else?
Ok for mainline if it passes?
Rainer
-----------------------------------------------------------------------------
Rainer Orth, Faculty of Technology, Bielefeld University
Wed Oct 8 13:57:17 2003 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
boehm-gc:
* mips_sgi_mach_dep.s: Use _ABIO32 instead of external
_MIPS_SIM_ABI32.
gcc:
* config/mips/iris6.h (TARGET_OS_CPP_BUILTINS): Define _ABIO32.
Use it in _MIPS_SIM definition.
* config/mips/linux.h (TARGET_OS_CPP_BUILTINS): Likewise.
* config/mips/mips.h (CRT_CALL_STATIC_FUNCTION): Likewise.
libffi:
* src/mips/ffi.c: Use _ABIN32, _ABIO32 instead of external
_MIPS_SIM_NABI32, _MIPS_SIM_ABI32.
libstdc++-v3:
* config/cpu/mips/atomicity.h (__atomic_add): Use _ABIO32 instead
of external _MIPS_SIM_ABI32.
Index: boehm-gc/mips_sgi_mach_dep.s
===================================================================
RCS file: /cvs/gcc/gcc/boehm-gc/mips_sgi_mach_dep.s,v
retrieving revision 1.6
diff -u -p -r1.6 mips_sgi_mach_dep.s
--- boehm-gc/mips_sgi_mach_dep.s 28 Jul 2003 04:18:20 -0000 1.6
+++ boehm-gc/mips_sgi_mach_dep.s 8 Oct 2003 12:23:33 -0000
@@ -24,7 +24,7 @@
# endif
SAVE_GP(GPOFF)
REG_S ra,RAOFF(sp)
-# if (_MIPS_SIM == _MIPS_SIM_ABI32)
+# if (_MIPS_SIM == _ABIO32)
call_push($2)
call_push($3)
# endif
Index: gcc/config/mips/iris6.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/iris6.h,v
retrieving revision 1.69
diff -u -p -r1.69 iris6.h
--- gcc/config/mips/iris6.h 27 Sep 2003 04:48:25 -0000 1.69
+++ gcc/config/mips/iris6.h 8 Oct 2003 12:23:47 -0000
@@ -86,7 +86,8 @@ Boston, MA 02111-1307, USA. */
\
if (mips_abi == ABI_32) \
{ \
- builtin_define ("_MIPS_SIM=_MIPS_SIM_ABI32"); \
+ builtin_define ("_ABIO32=1"); \
+ builtin_define ("_MIPS_SIM=_ABIO32"); \
builtin_define ("_MIPS_SZLONG=32"); \
builtin_define ("_MIPS_SZPTR=32"); \
} \
Index: gcc/config/mips/linux.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/linux.h,v
retrieving revision 1.67
diff -u -p -r1.67 linux.h
--- gcc/config/mips/linux.h 27 Sep 2003 04:48:25 -0000 1.67
+++ gcc/config/mips/linux.h 8 Oct 2003 12:23:47 -0000
@@ -81,7 +81,8 @@ Boston, MA 02111-1307, USA. */
} \
else \
{ \
- builtin_define ("_MIPS_SIM=_MIPS_SIM_ABI32"); \
+ builtin_define ("_ABIO32=1"); \
+ builtin_define ("_MIPS_SIM=_ABIO32"); \
builtin_define ("_MIPS_SZLONG=32"); \
builtin_define ("_MIPS_SZPTR=32"); \
} \
Index: gcc/config/mips/mips.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.h,v
retrieving revision 1.296
diff -u -p -r1.296 mips.h
--- gcc/config/mips/mips.h 7 Oct 2003 06:38:15 -0000 1.296
+++ gcc/config/mips/mips.h 8 Oct 2003 12:23:54 -0000
@@ -3477,7 +3477,7 @@ while (0)
we need to load our GP. We don't preserve $gp or $ra, since each
init/fini chunk is supposed to initialize $gp, and crti/crtn
already take care of preserving $ra and, when appropriate, $gp. */
-#if _MIPS_SIM == _MIPS_SIM_ABI32
+#if (defined _ABIO32 && _MIPS_SIM == _ABIO32)
#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
asm (SECTION_OP "\n\
.set noreorder\n\
Index: libffi/src/mips/ffi.c
===================================================================
RCS file: /cvs/gcc/gcc/libffi/src/mips/ffi.c,v
retrieving revision 1.4
diff -u -p -r1.4 ffi.c
--- libffi/src/mips/ffi.c 18 Jul 2002 23:08:31 -0000 1.4
+++ libffi/src/mips/ffi.c 8 Oct 2003 12:24:04 -0000
@@ -29,7 +29,7 @@
#include <stdlib.h>
-#if _MIPS_SIM == _MIPS_SIM_NABI32
+#if _MIPS_SIM == _ABIN32
#define FIX_ARGP \
FFI_ASSERT(argp <= &stack[bytes]); \
if (argp == &stack[bytes]) \
@@ -55,7 +55,7 @@ static void ffi_prep_args(char *stack,
register char *argp;
register ffi_type **p_arg;
-#if _MIPS_SIM == _MIPS_SIM_NABI32
+#if _MIPS_SIM == _ABIN32
/* If more than 8 double words are used, the remainder go
on the stack. We reorder stuff on the stack here to
support this easily. */
@@ -69,7 +69,7 @@ static void ffi_prep_args(char *stack,
memset(stack, 0, bytes);
-#if _MIPS_SIM == _MIPS_SIM_NABI32
+#if _MIPS_SIM == _ABIN32
if ( ecif->cif->rstruct_flag != 0 )
#else
if ( ecif->cif->rtype->type == FFI_TYPE_STRUCT )
@@ -92,7 +92,7 @@ static void ffi_prep_args(char *stack,
FIX_ARGP;
}
-#if _MIPS_SIM == _MIPS_SIM_ABI32
+#if _MIPS_SIM == _ABIO32
#define OFFSET 0
#else
#define OFFSET sizeof(int)
@@ -146,7 +146,7 @@ static void ffi_prep_args(char *stack,
}
else
{
-#if _MIPS_SIM == _MIPS_SIM_ABI32
+#if _MIPS_SIM == _ABIO32
memcpy(argp, *p_argv, z);
#else
{
@@ -178,7 +178,7 @@ static void ffi_prep_args(char *stack,
return;
}
-#if _MIPS_SIM == _MIPS_SIM_NABI32
+#if _MIPS_SIM == _ABIN32
/* The n32 spec says that if "a chunk consists solely of a double
float field (but not a double, which is part of a union), it
@@ -267,7 +267,7 @@ ffi_status ffi_prep_cif_machdep(ffi_cif
{
cif->flags = 0;
-#if _MIPS_SIM == _MIPS_SIM_ABI32
+#if _MIPS_SIM == _ABIO32
/* Set the flags necessary for O32 processing */
if (cif->rtype->type != FFI_TYPE_STRUCT)
@@ -322,7 +322,7 @@ ffi_status ffi_prep_cif_machdep(ffi_cif
}
#endif
-#if _MIPS_SIM == _MIPS_SIM_NABI32
+#if _MIPS_SIM == _ABIN32
/* Set the flags necessary for N32 processing */
{
unsigned shift = 0;
@@ -441,14 +441,14 @@ void ffi_call(ffi_cif *cif, void (*fn)()
switch (cif->abi)
{
-#if _MIPS_SIM == _MIPS_SIM_ABI32
+#if _MIPS_SIM == _ABIO32
case FFI_O32:
ffi_call_O32(ffi_prep_args, &ecif, cif->bytes,
cif->flags, ecif.rvalue, fn);
break;
#endif
-#if _MIPS_SIM == _MIPS_SIM_NABI32
+#if _MIPS_SIM == _ABIN32
case FFI_N32:
ffi_call_N32(ffi_prep_args, &ecif, cif->bytes,
cif->flags, ecif.rvalue, fn);
Index: libstdc++-v3/config/cpu/mips/atomicity.h
===================================================================
RCS file: /cvs/gcc/gcc/libstdc++-v3/config/cpu/mips/atomicity.h,v
retrieving revision 1.5
diff -u -p -r1.5 atomicity.h
--- libstdc++-v3/config/cpu/mips/atomicity.h 5 Jul 2003 04:05:28 -0000 1.5
+++ libstdc++-v3/config/cpu/mips/atomicity.h 8 Oct 2003 12:24:31 -0000
@@ -42,7 +42,7 @@ __exchange_and_add (volatile _Atomic_wor
("/* Inline exchange & add */\n\t"
"1:\n\t"
".set push\n\t"
-#if _MIPS_SIM == _MIPS_SIM_ABI32
+#if _MIPS_SIM == _ABIO32
".set mips2\n\t"
#endif
"ll %0,%3\n\t"
@@ -68,7 +68,7 @@ __atomic_add (volatile _Atomic_word *__m
("/* Inline atomic add */\n\t"
"1:\n\t"
".set push\n\t"
-#if _MIPS_SIM == _MIPS_SIM_ABI32
+#if _MIPS_SIM == _ABIO32
".set mips2\n\t"
#endif
"ll %0,%2\n\t"