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Re: Special Memory Constraint [was Re: Indirect memory addresses vs. lra]
On Mon, Aug 19, 2019 at 8:06 PM John Darrington
> On Mon, Aug 19, 2019 at 10:07:11AM -0500, Segher Boessenkool wrote:
> > ? As I remember there were a few other ideas from Richard Biener and
> > Segher Boessenkool.? I also proposed to add a new address register which
> > will be always a fixed stack memory slot at the end. Unfortunately I am
> > not familiar with the target and the port to say in details how to do
> > it.? But I think it is worth to try.
> The m68hc11 port used the fake Z register approach, and I believe it had
> some special machine pass to get rid of it right before assembler output.
> (r171302 is when it was removed -- last version was
> for the machine reorg stuff).
> No idea how well it works... But it's only needed if you are forced to
> have a frame pointer IIUC?
> Most of these suggestions involve adding some sort of virtual registers
> So I hacked the machine description to add two new registers Z1 and Z2
> with the same mode as X and Y.
> Obviously the assembler balks at this. However the compiler still
> ICEs at the same place as before.
> So this suggests that our original diagnosis, viz: there are not enough
> address registers was not accurate, and in fact there is some other
That sounds likely. Given you have indirect addressing you could
simulate N virtual regs by placing them in a virtual reg table in memory
and accessed via a fixed address register (assuming all instructions
that would need an address reg also can take that indirect from memory).
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