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Re: Expansion of narrowing math built-ins into power instructions


On Fri, Aug 09, 2019 at 12:14:54AM +0530, Tejas Joshi wrote:
> > In GCC (in we have the "*add<mode>3_fpr" and similar insns,
> > which could be extended to allow DF inputs with an SF output; it doesn't
> > yet allow it.
> This might be very lousy but I am confused with the optabs and insn
> name rn, the comments in obtabs.def says that these patterns are
> present in md as insn names. How can fadd function be mapped with the
> "fadd<mode>3_fpr" pattern name?

The actual name starts with an asterisk, which means as it is it can
never be used by name.  But, right above this pattern, there is the
define_expand named add<mode>3 (for modes SFDF).

These current patterns all take the same mode for all inputs and outputs
(that's what <mode>3 indicates, say, fadddf3).  You will need to define
something that takes two SFs in and produces a DF.  That cannot really
be in this same pattern, it needs a float_extend added (you can do all
kinds of trickery, but just adding a few extra patterns is much easier
than define_subst and whatnot).

> Also, faddl and daddl functions take long double as argument, can they
> also be expanded on DF to SF mode or only on QP float on power9?

We can have three different long double modes on powerpc: DP float, QP
float, or "IBM long double", also known as "double double", which is
essentially the sum of two double precision numbers.

Types (a source level construct) are not the same as modes (an RTL


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