Re: Bug 84762 - GCC for PowerPC32 violates the SysV ABI spec for small struct returns

[Lokesh Janghel <lokeshjanghel91 at gmail dot com>]

Hi Sirl,

As you mentioned in Bugzilla (comment 13),
aix_return ( return in memory)
svr4_return (return in register)
what is the semantics of svr4gnu w.r.t. return.

On Mon, Nov 19, 2018 at 11:33 PM Franz Sirl
<Franz.Sirl-kernel@lauterbach.com> wrote:
>
> Am 2018-11-19 um 15:36 schrieb Lokesh Janghel:
> > Hi Segher,
> >
> > I am building the GCC with the following configuration ( using gcc trunk ).
> >   ../gcc/configure --target=powerpc-linux
> > --prefix=/opt/buckeye/powerpc-linux --disable-shared --disable-threads
> > --enable-languages=c --with-newlib
> >
> > And my assembly code (without optimization) is:
> > $ cc1   -msvr4-struct-return test.c
> > .LFB0:
> >          stwu 1,-32(1)
> > .LCFI0:
> >          stw 31,28(1)
> > .LCFI1:
> >          mr 31,1
> > .LCFI2:
> >          lis 9,.LC0@ha
> >          la 9,.LC0@l(9)
> >          lhz 10,0(9)
> >          lbz 9,2(9)
> >          sth 10,11(31)
> >          stb 9,13(31)
> >          lhz 10,11(31)
> >          lbz 9,13(31)
> >          sth 10,8(31)
> >          stb 9,10(31)
> >          li 9,0
> >          lbz 10,8(31)
> >          rlwinm 10,10,0,24,31
> >          slwi 10,10,16
> >          rlwinm 9,9,0,16,7
> >          or 9,9,10
> >          lbz 10,9(31)
> >          rlwinm 10,10,0,24,31
> >          slwi 10,10,8
> >          rlwinm 9,9,0,24,15
> >          or 9,9,10
> >           lbz 10,10(31)
> >          rlwinm 10,10,0,24,31
> >          rlwinm 9,9,0,0,23
> >          or 9,9,10
> >          mr 3,9
> >          addi 11,31,32
> >          lwz 31,-4(11)
> > .LCFI3:
> >          mr 1,11
> > .LCFI4:
> >          blr
> >
> >
> > Assembly code (with optimization -O2) is:
> > $ cc1   -msvr4-struct-return -O2 test.c
> > .LFB0:
> >          stwu 1,-32(1)
> > .LCFI0:
> >          lis 3,0x11
> >          ori 3,3,0x2233
> >          addi 1,1,32
> > .LCFI1:
> >          blr
> >
> > As you mentioned assembly code in the GCC Bugzilla, I am not able to
> > reproduce the issue.
> > Please let me know your options used to reproduce this issue.
>
> Hi,
>
> you already reproduced the issue, according to the ABI, the code should
> look like:
>
> .LFB0:
>          stwu 1,-32(1)
> .LCFI0:
>          lis 3,0x1122
>          ori 3,3,0x3300
>          addi 1,1,32
> .LCFI1:
>          blr
>
> So the value being passed around should be left-aligned in the register.
>
> > Sirl,
> > If you got the patch for this issue or will look into the issue.
>
> I have an unfinished patch, it misses commandline handling, testcases
> and some code comments. I've attached it.
>
> It's unlikely I can continue to work on it anytime soon :-(.
>
> Franz



-- 
Thanks & Regards
Lokesh Janghel
+91-9752984749