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Re: Even numbered register pairs restriction on some instructions
- From: Jeff Law <law at redhat dot com>
- To: Matthew Malcomson <matthew dot malcomson at arm dot com>, gcc at gcc dot gnu dot org
- Cc: nd <nd at arm dot com>
- Date: Fri, 31 Aug 2018 11:06:54 -0600
- Subject: Re: Even numbered register pairs restriction on some instructions
- References: <db0313f6-31f3-f399-4e36-3e11f509c96c@arm.com>
On 08/31/2018 09:41 AM, Matthew Malcomson wrote:
> Hi there,
>
> I'm looking into whether it's possible to require even numbered
> registers on
> modes that need more than one hard-register to represent them. But only in
> some cases.
>
> The problem is the one mentioned explicitly here
> https://gcc.gnu.org/onlinedocs/gccint/Register-Classes.html about
> enforcing a
> requirement for a register pair to start with an even-numbered register.
> I can't use TARGET_HARD_REGNO_MODE_OK as suggested in that document
> because I'd
> like to allow register pairs starting with odd-numbered registers in
> general,
> but not in some specific cases.
>
> From a comment in gcc/config/sparc/constraints.md above the constraint
> "U" it
> looks like there isn't a way to define such a constraint when using LRA,
> and I
> haven't found any hook that could do so but I'm hoping there's something
> I'm
> missing.
>
> The best thing I can think of is to define a bunch of classes ZERO_ONE,
> TWO_THREE, FOUR_FIVE, ..., define a constraint on each of those classes,
> then
> use all the constraints as one alternative in my pattern.
>
> Is there a better method?
>
> Is there some small change that could enable a nicer method?
It would help to know more about when you want to allow odd registers.
I'd be surprised if creating a class, but still rejecting in
HARD_REGNO_MODE_OK worked...
Jeff