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Re: Inefficient code

From: Eric Botcazou <ebotcazou at adacore dot com>
To: Paul Koning <paulkoning at comcast dot net>
Cc: gcc at gcc dot gnu dot org
Date: Fri, 06 Jul 2018 00:47:09 +0200
Subject: Re: Inefficient code
References: <FB612838-028B-491B-82DB-6A334D8E8472@comcast.net> <4684420.5pAmr275xc@polaris> <F029574A-228D-4459-8414-82AB73F9988B@comcast.net>

> So back to the previous one: anything I can do about a 24 bit field getting
> split into three movqi rather than a movqi plus a movhi?  That happens
> during RTL expand, I believe.

Yes, this one doesn't look as hopeless as the store merging issue.  A way of 
tackling it would be to do a side-by-side debugging of a compiler built for a 
similar target for which only 2 stores are generated.

-- 
Eric Botcazou

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References:
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  - From: Paul Koning
- Re: Inefficient code
  - From: Eric Botcazou
- Re: Inefficient code
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