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Re: [Aarch64] Vector Function Application Binary Interface Specification for OpenMP
- From: Richard Sandiford <richard dot sandiford at linaro dot org>
- To: Jeff Law <law at redhat dot com>
- Cc: Steve Ellcey <sellcey at cavium dot com>, Alan dot Hayward at arm dot com, "Richard Earnshaw \(lists\)" <Richard dot Earnshaw at arm dot com>, Francesco Petrogalli <Francesco dot Petrogalli at arm dot com>, James Greenhalgh <James dot Greenhalgh at arm dot com>, "Sekhar\, Ashwin" <Ashwin dot Sekhar at cavium dot com>, gcc <gcc at gcc dot gnu dot org>, Marcus Shawcroft <Marcus dot Shawcroft at arm dot com>, nd <nd at arm dot com>
- Date: Tue, 29 May 2018 11:05:17 +0100
- Subject: Re: [Aarch64] Vector Function Application Binary Interface Specification for OpenMP
- References: <1518212868.14236.47.camel@cavium.com> <32617133-64DC-4F62-B7A0-A6B417C5B14E@arm.com> <1526487700.29509.6.camel@cavium.com> <a8761c95-e4fb-dd92-8988-825c8b34475f@arm.com> <1526491802.29509.19.camel@cavium.com> <87a7sznw5c.fsf@linaro.org> <1527184223.22014.13.camel@cavium.com> <87a7smbuej.fsf@linaro.org> <a94b6e17-fbf7-1dc3-b65c-cac4b476b06e@redhat.com>
Jeff Law <law@redhat.com> writes:
> Now that we're in stage1 I do want to revisit the CLOBBER_HIGH stuff.
> When we left things I think we were trying to decide between
> CLOBBER_HIGH and clobbering the appropriate subreg. The problem with
> the latter is the dataflow we compute is inaccurate (overly pessimistic)
> so that'd have to be fixed.
The clobbered part of the register in this case is a high-part subreg,
which is ill-formed for single registers. It would also be difficult
to represent in terms of the mode, since there are no defined modes for
what can be stored in the high part of an SVE register. For 128-bit
SVE that mode would have zero bits. :-)
I thought the alternative suggestion was instead to have:
(set (reg:M X) (reg:M X))
when X is preserved in mode M but not in wider modes. But that seems
like too much of a special case to me, both in terms of the source and
the destination:
- On the destination side, a SET normally provides something for later
instructions to use, whereas here the effect is intended to be the
opposite: the instruction has no effect at all on a value of mode M
in X. As you say, this would pessimise df without specific handling.
But I think all optimisations that look for the definition of a value
would need to be taught to "look through" this set to find the real
definition of (reg:M X) (or any value of a mode no larger than M in X).
Very few passes use the df def-uses chains for this due its high cost.
- On the source side, the instruction doesn't actually care what's in X,
but nevertheless appears to use it. This means that most passes would
need to be taught that a use of X on the rhs of a no-op SET is special
and should usually be ignored.
More fundamentally, it should be possible in RTL to express an
instruction J that *does* read X in mode M and clobbers its high part.
If we use the SET above to represent the clobber, and treat the rhs use
as special, then presumably J would need two uses of X, one "dummy" one
on the no-op SET and one "real" one on some other SET (or perhaps in a
top-level USE). Having the number of uses determine this seems
a bit awkward.
IMO CLOBBER and SET have different semantics for good reason: CLOBBER
represents an optimisation barrier for things that care about the value
of a certain rtx object, while SET represents a productive effect or
side-effect. The effect we want here is the same as a normal clobber,
except that the clobber is mode-dependent.
Thanks,
Richard