This is the mail archive of the
mailing list for the GCC project.
Re: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction
On Fri, Apr 13, 2018 at 01:34:21PM +0000, Vivek Kinhekar wrote:
> Hello Alexander,
> In the given testcase, the generated fdivrs instruction performs the
> division of a symbol ref (memory value) by FPU Stack Register and stores
> the value in FPU Stack Register.
The stack registers are not memory.
> Please find the following RTL Dump of the fdivrs instruction generated.
> It clearly access the memory for read access!
That is a constant read, that doesn't count either. It is in memory only
because the instruction doesn't support constant immediates, the memory is