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Re: Static Chain Register on iOS AArch64
- From: Richard Earnshaw <Richard dot Earnshaw at foss dot arm dot com>
- To: Stephen Cross <scross at scross dot co dot uk>, gcc at gcc dot gnu dot org
- Date: Thu, 04 Jun 2015 11:40:31 +0100
- Subject: Re: Static Chain Register on iOS AArch64
- Authentication-results: sourceware.org; auth=none
- References: <CADC9Eqps-Y5=7jBMsuGO7wd-U7QH2M4NUUZmGgZ89p5X5D_jjQ at mail dot gmail dot com>
On 03/06/15 23:55, Stephen Cross wrote:
> Hello,
>
> I noticed the following comment in the GCC source (
> https://github.com/gcc-mirror/gcc/blob/7c62dfbbcd3699efcbbadc9fb3aa14f23a123add/libffi/src/aarch64/ffitarget.h#L66
> ):
>
> /* iOS reserves x18 for the system. Disable Go closures until a new
> static chain is chosen. */
>
> Based on this comment, it sounds as if GCC hasn't yet decided which register
> to use for the static chain pointer on iOS AArch64. Is this correct?
>
> As I understand it, x18 (the platform register) is not used on Linux and hence
> can be used by GCC. I couldn't find anything saying this, so could you confirm
> this (that x18 is not used by Linux and hence used by GCC)?
>
> In terms of the register to choose for iOS AArch64, it seems like either x16 or
> x17 (the Intra Procedural call scratch registers) would be a good choice, in
> the same way that r12 is used for ARM 32-bit. Does this seem sensible, or
> is there some reason for rejecting these registers?
>
> I'd appreciate anything anyone can tell me about the above.
>
> In case you're interested, the context for this is:
> http://comments.gmane.org/gmane.comp.compilers.llvm.devel/86370
>
> Thanks,
> Stephen Cross
>
The static chain register is pretty much private to a translation unit
and GCC doesn't (to my knowledge) support iOS at all. Thus I don't
think there's any need for an ABI change or update.
I suspect that using one of the IP regs is not brilliant; there are some
concerns around the use of trampolines and closures that could lead to
problems if you do. Ideally, you just want a call-clobbered register
that's not used for parameter passing (unfortunately on ARM the only
such register is r12). In AArch64 there are plenty of registers in that
category you can chose from.
R.