This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
RE: Inter register constraints
- From: "Paulo Matos" <pmatos at broadcom dot com>
- To: "Georg-Johann Lay" <avr at gjlay dot de>
- Cc: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>
- Date: Thu, 11 Jul 2013 10:50:55 +0000
- Subject: RE: Inter register constraints
- References: <19EB96622A777C4AB91610E763265F46233AC5 at SJEXCHMB14 dot corp dot ad dot broadcom dot com> <51D6FC42 dot 4010700 at gjlay dot de>
> -----Original Message-----
> From: Georg-Johann Lay [mailto:avr@gjlay.de]
> Sent: 05 July 2013 18:03
> To: Paulo Matos
> Cc: gcc@gcc.gnu.org
> Subject: Re: Inter register constraints
>
> > have 64 registers that will give you 22 pairs. I could, of course,
> > create all of these by hand by defining 23 classes and define a
> > single constraint that matches these classes but I would like to know
> > if there's another way.
>
> What are you trying to achieve? In order so synthesize MOVW
> instructions after reload, see respective RTL peepholes.
>
Thanks Johann, that seems to be pretty much what I want to do.
However when, in avr, there's a HI move of a register pair only the first register shows up in the instruction.
So movw r0:r1, r2:r3
is a *movhi: (set (reg:HI r0) (reg:HI r2))
How does gcc know that r1 is going to be clobbered?
Is it because GET_MODE_SIZE (HImode) is twice the register size and so it assumed the following register is clobbered as well? (or is there any hook that needs to be set)
Paulo Matos