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ICE when calculate insn latency for armv7e-m arch in O2 level

From: "Joey Ye" <joey dot ye at arm dot com>
To: "Greta Yorsh" <Greta dot Yorsh at arm dot com>
Cc: <gcc at gcc dot gnu dot org>, "Zhuolin Liu" <Zhuolin dot Liu at arm dot com>, "Terry Guo" <Terry dot Guo at arm dot com>
Date: Fri, 6 Jul 2012 21:38:38 +0800
Subject: ICE when calculate insn latency for armv7e-m arch in O2 level

Greta,

Since this checkin, GCC ICE when build fix-point library with
-march=armv7e-m -O2. Reduced test case at
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53859

This is a show-stopper to cortex-m4 target.


URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=188742
Log:
The main function for epilogue RTL generation, used by expand epilogue
patterns.

gcc/

2012-06-18  Ian Bolton  <ian.bolton@arm.com>
            Sameera Deshpande  <sameera.deshpande@arm.com>
            Greta Yorsh  <greta.yorsh@arm.com>

        * config/arm/arm-protos.h (arm_expand_epilogue): New declaration.
        * config/arm/arm.c (arm_expand_epilogue): New function.
        * config/arm/arm.md (epilogue): Update condition and code.
        (sibcall_epilogue): Likewise.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/arm/arm-protos.h
    trunk/gcc/config/arm/arm.c
    trunk/gcc/config/arm/arm.md

Follow-Ups:
- RE: ICE when calculate insn latency for armv7e-m arch in O2 level
  - From: Greta Yorsh

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