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Re: Paradoxical subreg reload issue
09/05/2012 11:16, Eric Botcazou:
>> I have another issue in DCE pass after changing word_mode from SImode to
>> Indeed, in subreg1 pass, SI moves such as
>> (insn 42 41 43 (set (reg:SI 85) (reg/f:SI 83))
>> (insn 46 45 47 (set (reg:SI 8 a1) (reg:SI 85))
>> are split into HImode word moves:
>> (insn 98 97 99 2 (set (subreg:HI (reg:SI 106) 0) (reg:HI 104))
>> (insn 99 98 100 2 (set (subreg:HI (reg:SI 106) 2) (reg:HI 105 [+2 ]))
>> (insn 100 99 47 2 (set (reg:SI 8 a1) (reg:SI 106))
>> Looking at DCE pass in (dce_process_block), it seems that when reverse
>> parsing the block insns for dead set eliminations, the liveness of reg
>> 106 which is set when parsing insn 100, is removed when parsing insn 99.
>> So the insn 98 is deleted because the reg 106 is not seen live anymore...
>> Is it a bug, or is it because it is not possible to have hardware
>> registers which are not splittable in word_mode? Any thoughts?
> Yes, this looks like a bug, since the SET in insn 99 doesn't modify the high
> part of the multi-word (reg:SI 106), as per the documented rules for SUBREG.
It was a backend bug...
When trying to workaround the first reload bug, I defined
REGMODE_NATURAL_SIZE to return a mode rather than a mode size, which
makes DF_REF_PARTIAL not being set for (subreg:HI (reg:SI 106) 0).
Sorry about that, and thank you for pointing the DCE bug out.