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Register constraints + and =
- From: "Paulo J. Matos" <paulo at matos-sorge dot com>
- To: gcc at gcc dot gnu dot org
- Date: Fri, 04 May 2012 10:41:24 +0100
- Subject: Register constraints + and =
Hi,
I was just trying to understand exactly what constraint modifiers + and
= mean. I have read the manual but I am uncertain about their meaning in
the context of the following rule (without any modifiers):
Expand generates:
(define_insn_and_split "movmem_long"
[(set (match_operand:QI 2 "register_operand" "d,c") (const_int 0))
(set (mem:BLK (match_operand:QI 0 "register_operand" "d,c"))
(mem:BLK (match_operand:QI 1 "register_operand" "x,c")))
(set (match_dup 0) (plus:QI (match_dup 0) (match_dup 2)))
(set (match_dup 1) (plus:QI (match_dup 1) (match_dup 2)))
(clobber (match_scratch:QI 3 "w,w"))]
"!TARGET_NO_BLOCK_COPY"
"#"
"&& reload_completed"
[(const_int 0)]
{
if((which_alternative == 0 && REGNO(operands[2]) == RAH))
|| which_alternative == 1)
{
emit_move_insn(operands[3], operands[0]);
emit_move_insn(operands[0], operands[2]);
emit_move_insn(operands[2], operands[3]);
}
emit_insn(gen_bc2());
DONE;
})
From what I understand + is for input/output operands, = for output
only operands. Since in the above rule (a parallel) all operands are
written to and read to, does this mean all their constraints should
start with +? Or this only applies per set within each parallel (which
doesn't seem to make much sense)?
Cheers,
--
PMatos