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Re: GCC 4.7.0 and C++ atomics
On 03/08/12 00:17, Sebastian Huber wrote:
> thanks for the hints. Thus if we want to use the C++ atomic operations on 32-bit ARM in RTEMS we have to implement everything in
> and place it in e.g.
Possibly. It really depends on how rtems attacks the problem of
atomic operations across ARM cpu revisions. I have no opinion
as to what solution should be used.
> I guess similar procedures are required for other architectures.
Not really. ARM is unique in having an atomic insn (SWP) that
stops working in later ISA revisions, and a required memory
barrier (DMB) introduced late in the ISA revision history that
isn't a backward-compatible NOP.